TERAFAB

Intel Steps In — and Changes Everything

Intel officially announced today it will join the Terafab project alongside Tesla, SpaceX, and xAI. CEO Lip-Bu Tan posted a photo shaking hands with Elon Musk, confirming the two companies met at Intel's campus over the weekend. Intel's statement was precise: the company will contribute its capabilities in chip design, fabrication, and advanced packaging to help Terafab reach its goal of 1 terawatt per year of AI compute.

Tan did not mince words on the strategic significance: "Elon has a proven track record of re-imagining entire industries. This is exactly what is needed in semiconductor manufacturing today. Terafab represents a step change in how silicon logic, memory and packaging will get built in the future."

Intel's shares rose approximately 2% on the news — against a backdrop of Intel shares already up roughly 38% year-to-date, reflecting investor confidence in the Lip-Bu Tan turnaround.

The Biggest Credibility Gap Just Closed

When Terafab launched on March 21, its central vulnerability was clear: Tesla had zero semiconductor manufacturing experience. The company would need to recruit, from scratch, a workforce of process engineers in lithography, etching, chemical-mechanical planarization, EUV equipment, and yield management — disciplines that TSMC and Intel have accumulated over decades. Jensen Huang of Nvidia had publicly called it "virtually impossible."

Intel changes that calculus in several concrete ways:

• Process node expertise, immediately deployable. Intel's 18A process — featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery — entered high-volume manufacturing in late 2025 / early 2026. Tesla no longer needs to develop a 2nm process from zero. Intel has one in production, and Terafab now has access to that institutional knowledge and potentially that process itself.
• Advanced packaging at production scale. Intel's EMIB 2.5D has been in deployed products since 2017. Foveros 3D stacking has been in production since 2019. Foveros Direct — Cu-to-Cu hybrid bonding for sub-10 micron pitch — is the next-generation version entering production now. Terafab's packaging ambitions no longer require building this capability from the ground up.
• Fab construction and commissioning experience. Intel has built and commissioned leading-edge fabs in Oregon, Arizona, Ireland, and Israel. This institutional knowledge — cleanroom design, tool qualification, process integration, yield ramp methodology — is precisely what Terafab lacks and cannot be quickly recreated from job postings.
• An existing workforce pipeline. Intel has been executing significant restructuring under Lip-Bu Tan, including headcount reductions. This creates a near-term pool of experienced fab engineers and process technologists who could be redirected toward Terafab's Austin facility — a meaningfully faster path than cold recruiting.

An Anchor Customer for a Foundry in Crisis

Intel Foundry recorded an operating loss of $10.32 billion in 2025. Revenue grew just 3%. The foundry business's viability depends on landing high-volume, high-margin external customers — and that is exactly what Terafab represents if it executes on even a fraction of its stated ambitions.

Terafab's stated target — 70% of TSMC's total global wafer output from a single facility — represents a demand signal unlike anything Intel Foundry has secured before. Even at a more realistic 10–15% of that ambition, Terafab would be a transformational customer for a foundry business that badly needs one. The D.A. Davidson analyst called the announcement "an important step" in Intel's restructuring, noting that demonstrating the ability to support the largest customers on their most important projects is exactly what Intel's turnaround narrative requires.

Packaging Has Become the Foundry Business

Terafab's vertical integration ambition — fab, memory, advanced packaging, photonics, and testing under one roof — is not an outlier vision. It is the direction every major foundry has been moving for years. The Intel partnership makes Terafab's version of this strategy credible. Understanding why it matters requires understanding what the established players have already built.

The economics are straightforward: traditional monolithic chip scaling has hit physical and cost ceilings. The industry responded by disaggregating chips into chiplets and reassembling them in advanced packages. Whoever controls the packaging now controls the performance of the final system. Intel's foundry chief Naga Chandrasekaran said it plainly at WIRED: the upcoming decade will see chip packaging emerge as the main factor driving AI technological progress. Intel's CFO reported that packaging revenue projections have grown from hundreds of millions to well over $1 billion.

Where the Three Established Foundries Stand

The Incumbent Integrator — And Why It Matters to Terafab

TSMC is the undisputed technical leader in packaging-as-foundry-service, and it is the supply chain constraint Terafab was born to escape. For the past two years, the packaging gap has been the single greatest constraint on AI hardware deployment. TSMC is targeting a monthly output of 120,000 to 130,000 wafers by end of 2026 — up from roughly 90,000 at end of 2025 — with Nvidia reportedly having pre-booked over 50% of TSMC's total 2026 advanced packaging output. The demand side is leaving no room for competitors or alternative customers.

TSMC's COUPE (Compact Universal Photonic Engine) platform is entering volume production in 2026 — using SoIC-X chip stacking to place an electrical die directly on top of a photonic die, achieving a 5–10x improvement in power efficiency and 10–20x lower latency versus conventional approaches. TSMC's chairman publicly called silicon photonics a "More-than-Moore" pillar at the company's 2025 North America Technology Symposium. The foundry is no longer just making wafers — it is assembling complete optical-electronic systems.

The critical gap: TSMC's U.S. advanced packaging ground-breaking is not planned until 2028. Wafers produced at TSMC's Arizona fab currently still need to be shipped back to Taiwan for assembly and testing. This geographic and geopolitical exposure is precisely the national security and supply chain resilience gap that Terafab + Intel, both domiciled in the U.S., are positioned to address.

Intel's Pre-Existing Packaging Depth — Now Inside Terafab

Intel's packaging portfolio is the most directly relevant to the Terafab partnership. EMIB — Embedded Multi-die Interconnect Bridge — has been in production since 2017 as a cost-effective 2.5D alternative to large silicon interposers, cutting manufacturing time by weeks. The next-generation EMIB-T adds through-silicon vias for HBM integration. Foveros Direct, announced at Direct Connect 2025, enables Cu-to-Cu hybrid bonding at sub-10 micron pitch — the same technology class as TSMC's SoIC-X.

The clearest signal of Intel's direction: at Direct Connect 2025, Intel showed a future 12-reticle chip architecture featuring AI engines, HBM5, LPDDR5x, PCIe Gen7, optical engines, UCIe-A, EMIB-T, and 224G PHYs — all in a single package. Optical integration is not a future roadmap item at Intel. It is on the near-term product architecture diagram. Intel's stated goal is 1 trillion transistors in a package by 2030.

Terafab now has access to this entire portfolio. The "refactor" framing suggests the collaboration goes further — potentially co-developing new packaging and fab approaches, not simply porting Intel's existing technology to Austin.

Samsung's Counter-Positioning Against Both TSMC and Terafab

Samsung's strategic differentiation is that it alone among major foundries can offer logic, HBM memory, advanced packaging, and silicon photonics from within a single corporate entity — without depending on external memory suppliers as TSMC does. Samsung explicitly highlighted this vertical integration as its key differentiator versus TSMC at recent industry events.

Samsung's silicon photonics entry is worth watching: optical engines based on thermo-compression bonding are targeted for 2027, followed by turnkey co-packaged optics services in 2029. Its bump-less X-Cube Cu hybrid bonding at 4-micron pitch arrives in 2026. Samsung is executing a quieter version of the same verticalization strategy — and it will be a competitive pressure on Terafab's longer-term merchant foundry ambitions if those ever materialize.

Why Terafab's Space Chip Ambitions Require Optical Integration

Terafab's D3 chips — designed for SpaceXAI's orbital AI satellite constellation — face a constraint that terrestrial chips do not: in space, copper-based electrical interconnects face radiation hardening challenges and thermal limits that make optical interconnects increasingly attractive for high-bandwidth die-to-die communication. Musk's stated rationale for space-based AI (5x solar irradiance, vacuum heat rejection) only makes sense at scale if the interconnect architecture supporting the orbital compute fabric can handle the bandwidth demands of AI inference workloads at chip level.

This is where Intel's roadmap intersection with photonics — its optical engine inclusions in the 14A architecture diagram, its involvement in co-packaged optics research — becomes specifically relevant to Terafab's space application. NVIDIA is already working with TSMC on exactly this: vertically stacking a 65nm photonic integrated circuit directly on top of an advanced electronic IC using SoIC-X. If Terafab pursues a parallel approach using Intel's packaging infrastructure, the D3 chip's photonic integration ambitions become technically achievable rather than speculative.

The CPO market is projected to exceed $20 billion by 2036, growing at a 37% CAGR from 2026 to 2036. Terafab, with Intel's packaging expertise and its own space-application demand signal, is now positioned as a potential entrant in this market — not just a consumer of it.

A Vertically Integrated Chip Empire — Under One Roof

Elon Musk officially unveiled Terafab on March 21, 2026 at the defunct Seaholm Power Plant in Austin, Texas, calling it "the most epic chip building exercise in history by far." It is a joint venture between Tesla, SpaceX, and xAI — the AI company SpaceX recently acquired — designed to consolidate every stage of semiconductor production in-house: chip design, lithography, fabrication, memory production, advanced packaging, and testing. As of April 7, Intel is the fourth named partner.

At full capacity, Terafab would scale to roughly 70% of TSMC's total global wafer output from a single facility. The compute target — 1 terawatt annually — is split between Tesla's AI5 inference chips for vehicles and Optimus robots, and D3 chips custom-designed for SpaceXAI's orbital satellite constellation. A novel manufacturing claim: Tesla says it will use a wafer isolation method — enclosing wafers in protective enclosures throughout fabrication, potentially enabling processing in non-sterile ambient conditions. Intel's role in validating or enabling this architecture is one of the more interesting open questions in the partnership.

Supply Chain Ceiling — and a Dojo-Shaped Gap

• External suppliers are hitting a ceiling. At Tesla's Q4 2025 earnings call, Musk warned that capacity from TSMC, Samsung, and Micron would become inadequate within three to four years. "There's a maximum rate at which they're comfortable expanding." The constraint is not hypothetical — it mirrors what every major AI compute buyer is navigating right now.
• Autonomous vehicles and robotics demand is scaling exponentially. Both the Cybercab robotaxi and Optimus humanoid robot require AI inference chips at a volume Tesla's current supply chain cannot sustainably support. Without a proprietary supply, both programs are at the mercy of TSMC and Samsung allocation queues.
• The Dojo program was shut down, leaving a strategic gap. In August 2025, Tesla disbanded its entire Dojo supercomputer team and pivoted AI training compute to Cortex — a new supercomputer built on third-party Nvidia chips. Terafab is the manufacturing answer to what Dojo was supposed to solve from a different angle: where do the chips themselves come from at the volumes Tesla needs?

Two Chip Families, Three Markets — 80% Going to Space

• AI5 — Autonomous Vehicles & Optimus Robots (Internal). Tesla claims AI5 delivers a 50x total improvement over AI4. Small-batch production is targeted for 2026 with volume production in 2027. Tesla renamed its onboard inference chip from "FSD Computer" to "AI Computer" in software update 2026.2.9 — a signal the chip identity is broadening beyond autonomous driving into a general AI compute platform.
• D3 Chips — Orbital AI Satellites (SpaceXAI). 80% of Terafab's compute output is earmarked for space-based orbital AI satellites. Musk's argument is physics-based: solar irradiance in space is roughly 5x greater than at Earth's surface, and heat rejection in vacuum removes a key thermal scaling constraint. The SpaceXAI thesis is that within two to three years, running AI workloads in orbit will be cheaper than doing so on the ground.
• Potential Merchant Foundry Services (Future / Speculative). If Terafab achieves anything near its capacity ambitions, it could serve external customers — potentially competing with TSMC and Samsung for AI chip production in the 2030s. Musk has not officially stated this as a goal, but the capacity math and Intel's foundry expertise make it a logical downstream possibility.

From Shareholder Meeting to Intel Partnership — Five Months

The Strategic Logic — Strengthened by Intel

• Supply Chain Independence — Now More Credible. A domestic U.S. fab eliminates TSMC concentration risk for Tesla's most critical compute systems. With Intel's fab expertise, the 3–5 year path to first production is now a realistic program, not a press release.
• Vertical Integration Margin Capture. If Terafab produces chips at competitive cost, Tesla eliminates chipmaker markup from its cost structure — meaningful at the scale autonomous vehicles and Optimus require.
• CHIPS Act Alignment and National Security Relevance. A U.S.-domiciled, Intel-backed 2nm fab with defense-relevant space chip production is precisely the kind of facility CHIPS Act subsidies were designed to support. Tesla has not confirmed this pathway, but the eligibility profile has materially improved with Intel's involvement.
• Orbital AI Compute as a First-Mover Market. If space-based AI inference becomes economically viable, SpaceXAI — backed by Terafab silicon with Intel's photonics-capable packaging — would be the only vertically integrated orbital AI infrastructure provider on Earth.
• Intel's Foundry Turnaround — A Second Act. For Intel, Terafab is the kind of anchor customer win that transforms a struggling foundry business narrative. The operational loss at Intel Foundry was $10.32 billion in 2025. A terawatt-scale production partnership changes that math fundamentally if executed.